1. Field of the Invention
The present invention relates to an apparatus and method for compensating for a voltage ripple generated in a 3-phase inverter employing four switches, and more particularly to a voltage compensating apparatus and method for a 3-phase inverter employing four switches, to compensate for severe distortion in an applied 3-phase voltage due to a voltage ripple.
2. Description of the Related Art
Generally, 3-phase inverter circuits are known which use six power elements to generate a, b, and c-phase voltages, as shown in FIG. 1. As these phase voltages are supplied to a motor, the motor rotates.
However, such inverter circuits are expensive in that they use six power switching elements. In order to reduce the costs of such inverter circuits, an inverter circuit has been proposed which uses four switches to control a 3-phase motor. An example of such an inverter circuit is shown in FIG. 2.
FIG. 2 is a schematic circuit diagram illustrating a conventional 3-phase inverter employing four switches. As shown in FIG. 2, the conventional 3-phase inverter, for example, a motor controller for controlling a 3-phase electronic motor 1 includes a pair of DC link capacitors, that is, an upper DC link capacitor C1 and a lower DC link capacitor C2, connected to each other in series and adapted to receive a DC voltage rectified from an AC voltage, and to store the DC voltage therein. The 3-phase motor controller also includes a B4 inverter 2 stage configured to turn on or off in response to a switch control signal when the DC voltage from each of the capacitors C1 and C2 is supplied, thereby supplying a 3-phase voltage adapted to rotate [a] the 3-phase motor 1. The 3phase motor 1 is coupled to a connection node between the upper and lower DC link capacitors C1 and C2 coupled to respective switch legs of the B4 inverter 2.
In the case of employing four switches, the elements associated with the c-phase are eliminated. In this case, the c-phase terminal of the motor is connected to the connection node between the upper and lower DC link capacitors C1 and C2.
When a DC voltage is supplied to the upper and lower DC link capacitors C1 and C2 in the above mentioned configuration, these capacitors C1 and C2 are charged with the supplied voltage. The charged voltage from each capacitor is supplied to the B4 inverter 2.
The B4 inverter 2 supplied with the charged voltage supplies phase voltages to the motor 1 as its switches are turned on or off. The B4 inverter 2 has four switching statuses, as shown in FIGS. 4a to 4d. The following description will be made in association with the case in which the 3-phase motor has a Y-connection scheme. In the following description, xe2x80x9c0xe2x80x9d means an ON state of the upper switching elements in the B4 inverter 2 whereas xe2x80x9c1xe2x80x9d means an ON state of the lower switching elements. Where the B4 inverter 2 has a status of  less than 0, 0 greater than , respective lower switches of legs S1 and S2 are turned on whereas respective upper switches of the legs S1 and S2 are turned off.
Where only the upper ones of the switches respectively corresponding to the four voltage vectors of the B4 inverter 2 are switched on, that is, in a state  less than 1, 1 greater than , the voltage charged in the upper DC link capacitor C1, V1, is supplied to the 3-phase motor 1. In this state, no voltage is supplied from the lower DC link capacitor C2 to the 3-phase motor 1.
On the other hand, when only the lower switches are switched on, that is, in a state  less than 0, 0 greater than , the voltage charged in the lower DC link capacitor C2, V2, is supplied to the 3-phase motor 1. In this state, no voltage is supplied from the upper DC link capacitor C1 to the 3-phase motor 1.
In order to allow the 3-phase motor 1 to rotate, it is necessary to generate voltages of three phases each exhibiting a phase difference of 120xc2x0 from one another, Va, Vb and Vc, as shown in FIG. 3.
In order to generate these voltages of three phases, one of the 3-phase voltage vectors from the B4 inverter 2 respectively applied to the 3-phase motor 1 is coupled to the connection node between the upper and lower DC link capacitors C1 and C2, and the remaining two voltage vectors are coupled to respective legs between the upper switches and the associated lower switches.
Also, a voltage vector of an inverted phase is also applied to the connection node between the upper and lower DC link capacitors C1 and C2 in order to generate voltages having the same effect as balanced 3-phase voltages. As a result, two voltage vectors respectively denoted by xe2x80x9cVuxe2x80x9d and xe2x80x9cVwxe2x80x9d in FIG. 2 are generated. These voltage vectors serve as respective switching functions of the legs S1 and S2 in the B4 inverter 2.
The voltage vectors Vu and Vw serve to generate balanced 3-phase voltages along with a voltage of zero-phase. That is, it is possible to obtain 3-phase balanced voltages using four switches.
The two voltage vectors Vu and Vw generated by the B4 inverter 2 have a phase difference of 60xc2x0 therebetween, as shown in FIG. 3. In the case in which the c-phase of the 3-phase motor is connected to the connection node between the upper and lower DC link capacitors C1 and C2, as mentioned above, the phase of the voltage vector Vu is retarded from the a-phase voltage Va by 30xc2x0.
Therefore, where the B4 inverter 2 is controlled using pulse width modulated (PWM) pulses, it is possible to control the 3-phase motor 1 using a switching logic of the B4 inverter 2 expressed by the following Equation 1:                                           V            u                    =                                    V              a_dc                        =                                          [                                                      1                    2                                    +                                                                                    1                        2                                            ·                      ma                      ·                      sin                                        ⁢                                          xe2x80x83                                        ⁢                                          (                                              θ                        -                                                  π                          6                                                                    )                                                                      ]                            ·                              T                samp                                                    ⁢                  
                ⁢                              V            w                    =                                    V              b_dc                        =                                          [                                                      1                    2                                    +                                                                                    1                        2                                            ·                      ma                      ·                      sin                                        ⁢                                          xe2x80x83                                        ⁢                                          (                                              θ                        -                                                  π                          2                                                                    )                                                                      ]                            ·                              T                samp                                                                        [Equation  1]            
where, xe2x80x9cxcex8xe2x80x9d represents the rotor position, xe2x80x9cmaxe2x80x9d represents the modulation rate, and xe2x80x9cTsampxe2x80x9d represents the switching sampling time.
The above Equation 1 is associated with the case in which the c-phase of the 3-phase motor is connected to the connection node between the upper and lower DC link capacitors. Referring to Equation 1, it can be found that the voltages Vw and Vu have a phase difference of 60xc2x0 therebetween, and the voltage Vu is retarded in phase from the voltage Va by 30xc2x0. That is, there is an ON time ranging within the phase difference and phase retardation, for the sampling time.
Accordingly, the sampling time can be controlled using the ON time. Therefore, it is possible to control the 3-phase motor using four switching elements.
The interline voltage in the above mentioned conventional B4 inverter corresponds to the voltage across the upper DC link capacitor or the voltage across the lower DC link capacitor in accordance with the switching status of the B4 inverter. However, since the interline voltage results from the current supplied from only one capacitor, that is, the upper or lower DC link capacitor, the voltage ripple of each capacitor is rendered to be considerably high. Where the respective voltages across the capacitors are equal to each other, no phase variation occurs in the 3-phase voltage vectors. However, where the voltages respectively across the capacitors are different from each other, respective interline voltages corresponding to the switching states may have different levels and different phases, thereby resulting in a degradation in performance. For example, where the voltage V1 across the upper DC link capacitor and the voltage V2 across the lower DC link capacitor 4 are equal to each other, voltage vectors generated from the B4 inverter are orthogonal from one another, as shown in the left side of FIG. 5. However, where the voltages V1 and V2 are different from each other, voltage vectors distorted in level and phase are generated, as shown in the right side of FIG. 5. Also, where the voltages V1 and V2 are equal to each other, a normal voltage, V*, is applied, as shown in the left side of FIG. 6. However, where the voltages V1 and V2 are different from each other, voltages distorted in level and phases are applied as shown on the right side in FIG. 6, thereby resulting in a degradation in performance.
The present invention has been made in view of the above mentioned problems involved in the related art, and an object of the invention is to provide a voltage compensating apparatus and method for a 3-phase motor using four switches, which are capable of compensating for a voltage ripple.
Another object of the invention is to provide a voltage compensating apparatus and method for a 3-phase motor using four switches, in which respective charging paths of upper and lower DC link capacitors each adapted to supply voltage to a B4 inverter are different from each other, so as to reduce a voltage unbalance, thereby preventing a degradation in performance.
Another object of the invention is to provide a voltage compensating apparatus and method for a 3-phase motor using four switches, in which the voltage at a connection node between two capacitors connected to each other in series is compared with a DC link voltage to be charged in the capacitors, in order to compensate for switching functions by a DC offset corresponding to the difference between the compared voltages in accordance with a triangular wave comparison algorithm, thereby compensating for a severe distortion of a 3-phase applied voltage resulting from voltage ripple.
Another object of the invention is to provide a voltage compensating apparatus and method for a 3-phase motor using four switches, which is capable of allowing the voltage compensation of switching functions according to a triangular wave comparison algorithm, irrespective of the connection type of a motor to be controlled, for example, a Y-connection type or a xcex94-connection type.
In accordance with one aspect, the present invention provides a voltage compensating apparatus for a 3-phase inverter using four switches, comprising: upper and lower DC link capacitors connected to each other in series and adapted to receive an input DC voltage, and to charge the DC voltage therein; a B4 inverter for supplying a voltage to the 3-phase motor 1, using four switches, when it receives the charged voltage from each of the DC link capacitors; rectifying means for receiving an AC voltage from an AC voltage source, rectifying the received AC voltage into a DC voltage, and applying the rectified DC voltage to the upper and lower DC link capacitors; and a triac coupled at an input terminal thereof to one line of the AC voltage source while being coupled at an output terminal thereof to a connection node between the upper and lower DC link capacitors, the triac serving to control whether or not the upper and lower DC link capacitors are to be charged with the DC voltage, respectively.
In accordance with another aspect, the present invention provides a voltage compensating method for a 3-phase inverter using four switches, comprising the steps of: detecting a zero-crossing point of an input AC voltage using an interrupt having a frequency of 120 Hz; reading voltages respectively across upper and lower DC link capacitors charged with the input voltage, for thereby checking voltage ripples involved in the capacitor voltages; controlling a delay time from the zero-crossing point, based on the checked ripples; and generating a triac control signal for thereby switching on the triac when the controlled delay time elapses.
The step of generating the triac control signal may comprise a substep of generating the triac control signal in response to a negative polarity (xe2x88x92) of the input AC voltage if the voltage across the upper DC link capacitor is higher than the voltage across the lower DC link capacitor.
The step of generating the triac control signal may further comprise a substep of generating the triac control signal in response to a positive polarity (+) of the input AC voltage if the voltage across the lower DC link capacitor is higher than the voltage across the upper DC link capacitor.
The triac control signal may be generated at a point in time when the input AC voltage has a predetermined voltage level.